Source-Level Timing Simulation of Embedded Software Considering Compiler Optimizations

dc.contributor.author	Bringmann, Oliver
dc.contributor.author	Rosenstiel, Wolfgang
dc.date.accessioned	2015-04-22T14:45:36Z
dc.date.available	2015-04-22T14:45:36Z
dc.date.issued	2012
dc.identifier.isbn	978-1-4503-0636-2	de_DE
dc.identifier.uri	http://hdl.handle.net/10900/62956
dc.language.iso	en	de_DE
dc.publisher	IEEE	de_DE
dc.relation.uri	https://dx.doi.org/10.1145/2024724.2024838	de_DE
dc.rights	info:eu-repo/semantics/closedAccess
dc.subject.ddc	004	de_DE
dc.title	Source-Level Timing Simulation of Embedded Software Considering Compiler Optimizations	de_DE
dc.type	Article	de_DE
dc.type	ConferenceObject	de_DE
utue.publikation.seiten	486-491	de_DE
utue.personen.roh	Stattelmann, Stefan
utue.personen.roh	Bringmann, Oliver
utue.personen.roh	Rosenstiel, Wolfgang
dcterms.isPartOf.ZSTitelID	Proceedings DATE 2012 Dresden	de_DE